1. Field of the Invention
The present invention relates to a flat panel display device, and more particularly, to an apparatus and method for data interface of a flat panel display device, which is capable of transferring clocks in a state, in which the clocks are embedded in digital data, thereby reducing the number of transfer lines.
2. Discussion of the Related Art
As representative flat panel display devices, which display an image using digital data, a liquid crystal display (LCD) device using liquid crystals, a plasma display panel (PDP) using discharge of inert gas, an organic light emitting diode (OLED) display device using OLEDs are known.
Such flat panel display devices are being advanced toward higher resolution and larger size, in order to display an image of higher-quality. In this case, however, an increase in data transfer amount is required. As a result, there may be a problem in that electromagnetic interference (EMI) increases because it is necessary to use a higher data transfer frequency and an increased number of data transfer lines. In particular, the EMI problem may cause an unstable operation of a flat panel display device because EMI may occur mainly at a digital interface between a timing controller and a plurality of data integrated circuits (ICs) in the flat panel display device.
In order to reduce EMI and power consumption during high-speed transfer of data, flat panel display devices use various methods for data interface, together with 6 data buses. For example, flat panel display devices use a data interface method using a differential voltage, for example, a low voltage differential signal (LVDS), mini-LVDS, a reduced swing differential signal (RSDS), etc.
In such a data interface method, data transfer is achieved using a differential voltage between a pair of transfer lines. For this reason, it is necessary to use a pair of transfer lines per one bit of data. As a result, the number of data transfer lines increases, so that distortion of data caused by interference among the data transfer lines increases. For this reason, there is a problem in that it is difficult to design data transfer lines on a printed circuit board (PCB).
Meanwhile, conventional flat panel display devices use a multi-drop system in which a timing controller transfers clocks and data to a plurality of data ICs which, in turn, sequentially sample the transferred data in response to the transferred clocks, respectively, to use the sampled data. In such a multi-drop system, however, there is a problem in that it is difficult to achieve accurate data sampling because clock delay increases as the clock transfer distance from the timing controller increases.